When MemTest86 boots, a splashscreen is displayed with a 10 second countdown timer which when expires, automatically starts the memory tests with default settings. Pressing a key or moving the mouse shall stop the timer. To configure the memory tests, select Config and the main menu is displayed. The main menu allows the user to customize the memory test settings such as the specific tests to execute, address range to test and which CPU(s) are used in testing.
The Main Menu is structured as follows:
- System Info - displays the hardware details of the system
- Test Selection - specifies which tests to enable, and how many passes to run
- Address Range - specifies the lower and upper address memory limits to test
- CPU Selection - select between Single, Parallel, Round Robin and Sequential modes
- Start - start executing the memory tests
- RAM Benchmark - performs benchmarking tests on RAM, and graphs the results on a chart
- Settings - configure general MemTest86 settings such as language selection and screen resolution
- Exit - exits MemTest86 and reboots the system
(Pro and Site Edition only) Memory test parameters can also be set via a configuration file (mt86.cfg) that is loaded on startup, without the need to manually configure the memory tests every time MemTest86 is run. This is useful especially in testing environments where memory tests need to be executed in an automated fashion without user intervention.
MemTest86 attempts to look for configuration files in the following order:
MemTest86 shall first attempt to load a filename prefixed with the system’s baseboard (eg. Surface Pro-mt86.cfg). This allows for separate configuration files for different baseboards, if running MemTest86 on multiple systems.
If no suitable file was found, MemTest86 shall attempt to load a filename prefixed with the total memory size in GB (eg. 8GB-mt86.cfg). This allows for separate configuration files depending on the size of memory.
Finally, if a suitable file is still not found, it will load the default mt86.cfg configuration file.
The following is an example of a MemTest86 configuration file:
TSTLIST=0,1,3,5,8 TESTCFGFILE=customtests.cfg NUMPASS=3 ADDRLIMLO=0x10000000 ADDRLIMHI=0x20000000 MEMREMMB=16 MINMEMRANGEMB=16 CPUSEL=PARALLEL CPUNUM=1 CPULIST=2,3 MAXCPUS=32 DISABLEMP=1 ENABLEHT=1 ECCPOLL=0 ECCINJECT=0 MEMCACHE=0 PASS1FULL=0 ADDR2CHBITS=12,9,7 ADDR2SLBITS=3,4 ADDR2CSBITS=8 CHIPMAP=1,3,5,7,2,4,6,8 CHIPMAP.DDR5=3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18 CHIPMAP.DDR5.SODIMM.1R=1,2,3,4,11,12,13,14 CHIPMAP.DDR5.DIMM.1R.x8.8GB=3,4,5,6,7,8,9,10 CHIPMAP.DDR5.DIMM.2R.x8.16GB=3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18 CHIPMAP.DDR4=1,2,3,4,6,7,8,9,10,11,12,13,14,15,16,17 CHIPMAP.DDR4.SODIMM.1R=1,2,3,4,11,12,13,14 CHIPMAP.DDR4.DIMM.1R.x8.8GB=1,2,3,4,5,6,7,8 CHIPMAP.DDR4.DIMM.2R.x8.16GB=1,2,3,4,6,7,8,9,10,11,12,13,14,15,16,17 LANG=ja-JP REPORTNUMERRS=10 REPORTNUMWARN=0 REPORTPREFIX=BASEBOARDSN AUTOMODE=1 AUTOREPORT=0 AUTOREPORTFMT=HTML AUTOPROMPTFAIL=1 SKIPSPLASH=1 SKIPDECODE=0 EXITMODE=1 MINSPDS=0 EXACTSPDS=0 EXACTSPDSIZE=8192 CHECKMEMSPDSIZE=1 SPDMANUF=Kingston SPDPARTNO=9905402 SPDMATCH=1 SAMESPDPARTNO=1 BGCOLOR=BLUE HAMMERPAT=0x10101010 HAMMERMODE=SINGLE HAMMERSTEP=0x10000 CONSOLEMODE=1 CONSOLEONLY=0 BITFADESECS=300 MAXERRCOUNT=10000 TFTPSERVERIP=192.168.1.1 TFTPSTATUSSECS=60 PMPDISABLE=0 RTCSYNC=1 TRIGGERONERR=1 VERBOSITY=1 TPL=HIGH_LEVEL
|TSTLIST||List of tests to execute in the test sequence. Each test is specified by a test number, separated by a comma.|
|TESTCFGFILE||Specifies the name of the file containing custom individual test definitions. This replaces the standard Test 0-13 individual tests used by default. See Custom test definitions for file format specifications.|
|NUMPASS||Number of iterations of the test sequence to execute. This must be a number greater than 0.|
|ADDRLIMLO||The lower limit of the address range to test. To specify a hex address, the address must begin with '0x'. Otherwise, the address shall be interpreted as a decimal address.|
|ADDRLIMHI||The upper limit of the address range to test. To specify a hex address, the address must begin with '0x'. Otherwise, the address shall be interpreted as a decimal address.|
One of the following CPU selection modes:
'SINGLE', 'PARALLEL', 'RROBIN', 'SEQ'
|CPUNUM||The CPU # of the logical CPU core to test in SINGLE CPU mode. This parameter only has an effect if CPUSEL is set to 'SINGLE', and is ignored otherwise. This value must be less than the value specified by MAXCPUS.|
|CPULIST||List of CPUs to enable for memory testing. This is useful for using only a subset of the available CPUs when performing memory testing. Each CPU is specified by a CPU number, separated by a comma. By default, all available CPUs are enabled.|
|MAXCPUS||The maximum number of logical CPUs cores to be enabled for testing. Only CPU numbers less than this value can be enabled. By default, this value is 256. This value must be at least 1 and no more than 512.|
Specifies whether to disable multiprocessor support. This can be used as a workaround for certain UEFI firmwares that have issues running MemTest86 in multi-CPU modes.
0 – Do not disable multiprocessor support
Specifies whether to enable testing on hyperthreads. By default, memory tests are not run on hyperthreads.
0 – Do not enable testing on hyperthreads
Specifies whether ECC errors shall be polled.
0 – Polling disabled, 1 – Polling enabled
Specifies whether ECC error injection shall be enabled.
0 – ECC injection disabled, 1 – ECC injection enabled
Specifies whether memory caching shall be enabled/disabled during testing.
0 – Memory caching disabled, 1 – Memory caching enabled
Specifies whether the first pass shall run the full or reduced test. By default, the first pass shall run a reduced test (ie. fewer iterations) in order to detect the most obvious errors as soon as possible.
0 – Reduced test, 1 – Full test
List of bit positions of a memory address to exclusive-or (XOR) to determine which memory channel (0 or 1) is used. This is useful if you know that the memory controller maps a particular address to a channel using this decoding scheme. If this parameter is specified and MemTest86 detects a memory error, the channel number will be calculated and displayed along with the faulting address. Each bit position specified is separated by a comma. For example,
ADDR2CHBITS=1,8,9will XOR bits 1,8,9 of the address to determine the channel.
List of bit positions of a memory address to exclusive-or (XOR) to determine which slot (0 or 1) is used. This is useful if you know that the memory controller maps a particular address to a slot using this decoding scheme. If this parameter is specified and MemTest86 detects a memory error, the slot number will be calculated and displayed along with the faulting address. Each bit position specified is separated by a comma. For example,
ADDR2SLBITS=3,4will XOR bits 3,4 of the address to determine the slot.
List of bit positions of a memory address to exclusive-or (XOR) to determine the chip select bits (0 or 1). This is useful if you know that the memory controller maps a particular address to a CS bit using this decoding scheme. If this parameter is specified and MemTest86 detects a memory error, the CS bit will be calculated and displayed along with the faulting address. Each bit position specified is separated by a comma. For example,
ADDR2CSBITS=5,11will XOR bits 5, 11 of the address to determine the CS bit.
Map used to label each DRAM chip to a particular chip number when tracking chip-level errors (Site Edition only). By default, the chips shall be labeled from U0...U15. For example,
shall label the DRAM chips as U1,U3,U5,U7,U2,U4,U6,U8 in order. See DIMM / Chip error decoding for the chip numbering convention for different module configurations.
This parameter also supports different mappings for each RAM module configuration. This is specified by optional attributes following the CHIPMAP parameter. For example,
If there are multiple matches, the chip map parameter that matches the most attributes shall be applied.
Specifies one of the following languages to use:
'en-US' - English
|REPORTNUMERRS||Number of the most recent errors to display in the report file. This number must be no more than 5000.|
|REPORTNUMWARN||Number of the most recent warnings to display in the report file. This number must be no more than 5000. Currently, this parameter is used only for the Hammer Test (Test 13)|
Specifies whether the report filename shall be prepended with a prefix string.
'BASEBOARDSN' - Use the SMBIOS Baseboard serial number string
Specifies the level of user intervention to use when running the memory tests.
0 – Auto mode disabled (default).Splash screen and main menu are displayed. User is prompted to save the report file when the tests have completed.
1 – Auto mode enabled.The tests are started immediately, skipping the splash screen and main menu. Once the tests have completed, the test results are automatically saved to the report file and the system is rebooted.
2 – Auto mode w/ prompts.The tests are started immediately, skipping the splash screen and main menu. Once the tests have completed, the user is prompted to save the test results to a report file.
If AUTOMODE is set to 1 or 2, this parameter specifies whether to automatically save test results to the report file.
0 – Do not save test results automatically
|AUTOREPORTFMT||Specifies the format of the report when AUTOMODE is enabled and AUTOREPORT=1.|
Specifies whether to display the test result and ask for user intervention on test failure, even when AUTOMODE is enabled.
0 – Do not prompt for user intervention on test failure (default)
Specifies whether to skip the 10 second splash screen and proceed directly to the main menu.
0 – Do not skip splash screen
skip the decode results screen after completion of tests
0 – Do not skip decode screen
Specifies the system behaviour when MemTest86 exits
0 – Reboot the system
|MINSPDS||Minimum number of RAM SPDs to be detected before allowing the memory tests to begin.|
|EXACTSPDS||Exact number of RAM SPDs to be detected before allowing the memory tests to begin. If this parameter is set, MINSPDS parameter is ignored.|
|EXACTSPDSIZE||Total size (in MB) of the capacity of all detected RAM SPDs to match before allowing the memory tests to begin.|
Specifies whether to check if the total memory capacity of all RAM SPDs detected is consistent with the system memory size before allowing the memory tests to begin.
0 – Do not check for consistency (default)
|SPDMANUF||Specifies a case-sensitive substring to match the JEDEC manufacturer of all detected RAM SPDs before allowing the memory tests to begin.|
Specifies whether to perform matching of RAM SPD bytes against the raw values stored in the SPD.spd file before the tests start and after the tests complete. See MemTest86 User Guide for SPD.spd file specifications. The tests will not start if any of the following are satisfied:
0 – Do not perform the SPD match check (default)
|SPDPARTNO||Specifies a case-sensitive substring to match the part number of all detected RAM SPDs before allowing the memory tests to begin.|
|SAMESPDPARTNO||Specifies whether the RAM SPD Part Numbers must match before allowing the memory tests to begin.|
Specifies an alternative background colour to use:
|HAMMERPAT||Specifies a 32-bit data pattern to use for the row hammer test (Test 13). If this parameter is not specified, random data patterns are used.|
Specifies one of the following hammering algorithms to use for the row hammer test (Test 13):
'SINGLE' - single-sided hammer test
|HAMMERSTEP||The step size in bytes to use to determine the next row address pair to hammer. The size can be specified as a decimal or hex number. To specify a hex number, the size must begin with '0x'. This value must be greater than or equal to 64 bytes.|
|CONSOLEMODE||Specifies the console mode to use for the UEFI console. The UEFI firmware supports 1 or more console modes that determines the resolution of the console. All UEFI firmware supported mode 0 which is the minimum supported resolution of 80x25.|
Specifies whether to run using the console only (ie. no graphics). This allows for systems without graphics support (eg. Systems with serial console only)
0 – Normal mode (Enable graphics support)
Specifies the sleep time in seconds to use for the Bit Fade test (Test 10). By default, the sleep time is 300 seconds (5 minutes). This value must be between 180 seconds (3 minutes) and 600,000 seconds (10,000 minutes).
In general, setting the sleep interval to a longer value shall test the data retention of RAM more thoroughly. To our knowledge, although there have been no comprehensive studies that determine the optimal sleep period, setting a sleep interval of 5 to 10 minutes would be a good compromise between comprehensive testing and reasonable testing time.
|MAXERRCOUNT||Specifies the maximum number of errors before the tests are aborted. By default, the value is 10000.|
|TFTPSERVERIP||Specifies a TFTP server IP address that is different from the PXE/DHCP server IP for saving the report files|
|TFTPSTATUSSECS||Specifies the period in seconds to report the current test status to the TFTP server, which is displayed in the management console. By default, the period is 60 seconds (1 minute). This value must be between 10 seconds and 600 seconds (10 minutes).|
Specifies whether to disable Management Console integration via TFTP uploading of XML messages
0 – Do not disable TFTP uploading of XML messages (default)
Specifies whether to set the real-time clock (RTC) by reading a file, CurrentText.txt, from the PXE server. The format of the time is as follows:
YYYY-MM-DD hh:mm:ss For example, 2020-05-22 00:53:14
0 – Do not synchronize the real-time clock with the PXE server (default)
Specifies whether to enable triggering on memory error for use with logic analyzers. Before the test is started, the memory address of the structure where errors are logged is displayed on screen to allow for configuration of the logic analyzer. When memory errors are detected, the pattern 0xDEADBEEF and error details are written to the following structure:
0 – Do not trigger and log on memory errors
Specifies the verbosity level of the debug output
0 – Lowest verbosity level (default)
Specifies the UEFI task priority level of the MemTest86 application. UEFI tasks with higher priority level may interrupt and preempt MemTest86.
'APPLICATION' - lowest priority level (default)