MemTest86 Technical Information
What's New in Version 5?
MemTest86 supports booting from both the newer UEFI platform and the traditional BIOS. When booting from UEFI, MemTest86 has access to additional services not available in BIOS including:
See the feature comparison page for a summary of the differences between the various editions of MemTest86.
If UEFI is not supported on the system, the older v4 BIOS version is booted. MemTest86 can boot from a CD, USB flash drive or, with Linux systems, by the boot loader (for example, LILO or Grub). To use MemTest86 on a Windows computer, either a CD-ROM drive or USB flash drive is required. Any Unix or Windows system may be used to create the CD or USB flash drive. Once a MemTest86 boot disk has been created, it may be used on any computerBack to top
Windows Boot-disk Creation
Before you can use MemTest86 on a Windows system it must first be installed on a CD-ROM, USB flash drive or floppy disk. To create a CD-ROM a system with the capability of creating a CD-Image from an ISO file is required.
Create a boot-able CD-ROM:
Create a boot-able USB Flash drive:
Create a boot-able floppy (v4 only):
Linux Boot-disk Creation
MemTest86 is a stand alone program and can be loaded from a bootable CD-ROM, USB disk, floppy disk or a Linux disk partition. It is recommended that Linux users download and install pre-compiled packages to create bootable media. Advanced users may wish to build from source and optionally make source code changes.
Create a boot-able CD-ROM:
Create a boot-able USB Flash drive:
Create a boot-able floppy (v4 only):
Apple Mac Boot-disk Creation
See this forum post for details on how to prepare a bootable CD on an Apple Mac for RAM testing.Back to top
MemTest86 supports booting from both UEFI and BIOS systems. Most newer systems are able to run the UEFI version of MemTest86, but all systems should be able to boot the traditional BIOS version.
To start MemTest86 insert the CD-ROM or USB flash drive into the appropriate drive and restart your computer. Note: If running on a UEFI system, the UEFI BIOS must be configured to boot from the device that MemTest86 is installed on. Most systems have an optional boot menu that is enabled be pressing a key at startup (often ESC, F9, F11 or F12) similar to the following:
If available use the boot menu to select the correct drive. You may see both the UEFI and BIOS as separate options. Please consult your motherboard documentation for details.Back to top
When MemTest86 boots, a splashscreen is displayed with a 10 second countdown timer which when expires, automatically starts the memory tests with default settings. Pressing a key or moving the mouse shall stop the timer. To configure the memory tests, select 'Config' and the main menu is displayed. The main menu allows the user to customize the memory test settings such as the specific tests to execute, address range to test and which CPU(s) are used in testing.
The Main Menu is structured as follows:
(Pro version only) Memory test parameters can also be set via a configuration file that is loaded on startup, without the need to manually configure the memory tests every time MemTest86 is run. This is useful especially in testing environments where memory tests need to be executed in an automated fashion without user intervention. The following is an example of a MemTest86 configuration file:
TSTLIST=0,1,3,5,8 NUMPASS=3 ADDRLIMLO=0x10000000 ADDRLIMHI=0x20000000 CPUSEL=PARALLEL CPUNUM=1 ECCPOLL=0Back to top
At the end of the test, a summary of the test results is displayed, as shown in the following screenshot:
Error Confidence Value: A value that indicates the validity of the errors being reported with larger values indicating greater validity. There is a high probability that all errors reported are valid regardless of this value. However, when this value exceeds 100 it is nearly impossible that the reported errors will be invalid. Lowest Error Address: The lowest address that where an error has been reported. Highest Error Address: The highest address that where an error has been reported. Bits in Error Mask: A mask of all bits that have been in error (hexadecimal). Bits in Error: Total bit in error for all error instances and the min, max and average bit in error of each individual occurrence. Max Contiguous Errors: The maximum of contiguous addresses with errors. ECC Correctable Errors: The number of errors that have been corrected by ECC hardware. Test Errors: On the right hand side of the screen the number of errors for each test are displayed.Back to top
Troubleshooting Memory Errors
Please be aware that not all errors reported by MemTest86 are due to bad memory. The test implicitly tests the CPU, L1 and L2 caches as well as the motherboard. It is impossible for the test to determine what causes the failure to occur. However, most failures will be due to a problem with memory module. When it is not, the only option is to replace parts until the failure is corrected.
Once a memory error has been detected, determining the failing SIMM/DIMM module is not a clear cut procedure. With the large number of motherboard vendors and possible combinations of memory slots it would be difficult if not impossible to assemble complete information about how a particular error would map to a failing memory module. However, there are steps that may be taken to determine the failing module. Here are four techniques that you may wish to use:
Sometimes memory errors show up due to component incompatibility. A memory module may work fine in one system and not in another. This is not uncommon and is a source of confusion. In these situations the components are not necessarily bad but have marginal conditions that when combined with other components will cause errors.
Often the memory works in a different system or the vendor insists that it is good. In these cases the memory is not necessarily bad but is not able to operate reliably at full speed. Sometimes more conservative memory timings on the motherboard will correct these errors. In other cases the only option is to replace the memory with better quality, higher speed memory. Don't buy cheap memory and expect it to work reliably. On occasion "block move" test errors will occur even with name brand memory and a quality motherboard. These errors are legitimate and should be corrected.
We are often asked about the reliability of errors reported by Mestest86. In the vast majority of cases errors reported by the test are valid. There are some systems that cause MemTest86 to be confused about the size of memory and it will try to test non-existent memory. This will cause a large number of consecutive addresses to be reported as bad and generally there will be many bits in error. If you have a relatively small number of failing addresses and only one or two bits in error you can be certain that the errors are valid. Also intermittent errors are without exception valid. Frequently memory vendors question if MemTest86 supports their particular memory type or a chipset. MemTest86 is designed to work with all memory types and all chipsets.
All valid memory errors should be corrected. It is possible that a particular error will never show up in normal operation. However, operating with marginal memory is risky and can result in data loss and even disk corruption. Even if there is no overt indication of problems you cannot assume that your system is unaffected. Sometimes intermittent errors can cause problems that do not show up for a long time. You can be sure that Murphy will get you if you know about a memory error and ignore it.
MemTest86 cannot diagnose many types of PC failures. For example a faulty CPU that causes Windows to crash will most likely just cause MemTest86 to crash in the same way.Back to top
The time required for a complete pass of MemTest86 will vary greatly depending on CPU speed, memory speed and memory size. The pass counter increments after all of the selected tests have been run. Generally a single pass is sufficient to catch all but the most obscure errors. However, for complete confidence when intermittent errors are suspected testing for a longer period is advised.Back to top
Memory Testing Philosophy
There are many good approaches for testing memory. However, many tests simply throw some patterns at memory without much thought or knowledge of memory architecture or how errors can best be detected. This works fine for hard memory failures but does little to find intermittent errors. BIOS based memory tests are useless for finding intermittent memory errors.
Memory chips consist of a large array of tightly packed memory cells, one for each bit of data. The vast majority of the intermittent failures are a result of interaction between these memory cells. Often writing a memory cell can cause one of the adjacent cells to be written with the same data. An effective memory test attempts to test for this condition. Therefore, an ideal strategy for testing memory would be the following:
It should be obvious that this strategy requires an exact knowledge of how the memory cells are laid out on the chip. In addition there is a never ending number of possible chip layouts for different chip types and manufacturers making this strategy impractical. However, there are testing algorithms that can approximate this ideal.Back to top
MemTest86 Test Algorithms
MemTest86 uses two algorithms that provide a reasonable approximation of the ideal test strategy above. The first of these strategies is called moving inversions. The moving inversion test works as follows:
This algorithm is a good approximation of an ideal memory test but there are some limitations. Most high density chips today store data 4 to 16 bits wide. With chips that are more than one bit wide it is impossible to selectively read or write just one bit. This means that we cannot guarantee that all adjacent cells have been tested for interaction. In this case the best we can do is to use some patterns to insure that all adjacent cells have at least been written with all possible one and zero combinations.
It can also be seen that caching, buffering and out of order execution will interfere with the moving inversions algorithm and make less effective. It is possible to turn off cache but the memory buffering in new high performance chips can not be disabled. To address this limitation a new algorithm I call Modulo-X was created. This algorithm is not affected by cache or buffering. The algorithm works as follows:
This algorithm accomplishes nearly the same level of adjacency testing as moving inversions but is not affected by caching or buffering. Since separate write passes (1a, 1b) and the read pass (1c) are done for all of memory we can be assured that all of the buffers and cache have been flushed between passes. The selection of 20 as the stride size was somewhat arbitrary. Larger strides may be more effective but would take longer to execute. The choice of 20 seemed to be a reasonable compromise between speed and thoroughness.Back to top
Individual Test Descriptions
MemTest86 executes a series of numbered test sections to check for errors. These test sections consist of a combination of test algorithm, data pattern and cache setting. The execution order for these tests were arranged so that errors will be detected as rapidly as possible. A description of each of the test sections follows:
Test 0 [Address test, walking ones, no cache]
Tests all address bits in all memory banks by using a walking ones address pattern.
Test 1 [Address test, own address, Sequential]
Each address is written with its own address and then is checked for consistency. In theory previous tests should have caught any memory addressing problems. This test should catch any addressing errors that somehow were not previously detected. This test is done sequentially with each available CPU.
Test 2 [Address test, own address, Parallel]
Same as test 1 but the testing is done in parallel using all CPUs and using overlapping addresses.
Test 3 [Moving inversions, ones&zeros, Parallel]
This test uses the moving inversions algorithm with patterns of all ones and zeros. Cache is enabled even though it interferes to some degree with the test algorithm. With cache enabled this test does not take long and should quickly find all "hard" errors and some more subtle errors. This is done in parallel using all CPUs.
Test 4 [Moving inversions, 8 bit pattern]
This is the same as test 3 but uses a 8 bit wide pattern of "walking" ones and zeros. This test will better detect subtle errors in "wide" memory chips.
Test 5 [Moving inversions, random pattern]
Test 5 uses the same algorithm as test 4 but the data pattern is a random number and it's complement. This test is particularly effective in finding difficult to detect data sensitive errors. The random number sequence is different with each pass so multiple passes increase effectiveness.
Test 6 [Block move, 64 moves]
This test stresses memory by using block move (movsl) instructions and is based on Robert Redelmeier's burnBX test. Memory is initialized with shifting patterns that are inverted every 8 bytes. Then 4mb blocks of memory are moved around using the movsl instruction. After the moves are completed the data patterns are checked. Because the data is checked only after the memory moves are completed it is not possible to know where the error occurred. The addresses reported are only for where the bad pattern was found. Since the moves are constrained to a 8mb segment of memory the failing address will always be less than 8mb away from the reported address. Errors from this test are not used to calculate BadRAM patterns.
Test 7 [Moving inversions, 32 bit pattern]
This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address. The starting bit position is shifted left for each pass. To use all possible data patterns 32 passes are required. This test is quite effective at detecting data sensitive errors but the execution time is long.
Test 8 [Random number sequence]
This test writes a series of random numbers into memory. By resetting the seed for the random number the same sequence of number can be created for a reference. The initial pattern is checked and then complemented and checked again on the next pass. However, unlike the moving inversions test writing and checking can only be done in the forward direction.
Test 9 [Modulo 20, Random pattern]
Using the Modulo-X algorithm should uncover errors that are not detected by moving inversions due to cache and buffering interference with the algorithm.
Test 10 [Bit fade test, 2 patterns]
The bit fade test initializes all of memory with a pattern and then sleeps for a few minutes. Then memory is examined to see if any memory bits have changed. All ones and all zero patterns are used.
Test 11 [Random number sequence, 64-bit]
This test is the same as Test 8, but native 64-bit instructions are used.
Test 12 [Random number sequence, 128-bit]
This test is the same as Test 8, but native SIMD (128-bit) instructions are used.Back to top